Modern consumer electronics, such as smart phones, personal digital assistants, and location based services devices, as well as enterprise electronics, such as servers and storage arrays, are packing more semiconductor die into an ever-shrinking physical space with expectations for decreasing cost.
Every new generation of semiconductor die with increased operating frequency, performance, and higher level of large-scale integration has underscored the need for back-end semiconductor manufacturing to provide more solutions. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new package technologies while others focus on improving the existing and mature package technologies.
Integrated circuit package structures continue to advance toward miniaturization to increase the density of the components that are packaged in them while decreasing the sizes of the products that are made using the packages. This is in response to continually increasing demands on information and communication apparatus for ever-reduced sizes, thicknesses, and costs along with ever-increasing performance.
These increasing requirements for miniaturization are particularly noteworthy, for example, in portable information and communication devices such as cellular phones, hands-free cellular phone headsets, personal data assistants (“PDA's”), camcorders, notebook personal computers, and so forth. All of these devices continue to be made smaller and smaller to improve their portability. Accordingly, large-scale IC (“LSI”) packages that are incorporated into these devices are required to be made smaller. The package configurations that house and protect LSI require them to be made smaller as well.
Many conventional integrated circuit packages are of the type where a semiconductor die is molded into a package with a resin, such as an epoxy molding compound. The packages have a lead frame whose leads are projected from the package body, to provide a path for signal transfer between the die and external devices. Other conventional package configurations have contact terminals or pads formed directly on the surface of the package.
Such a conventional integrated circuit package is fabricated through the following processes: a die-bonding process (mounting the semiconductor die onto the paddle of a lead frame), a wire-bonding process (electrically connecting the semiconductor die on the paddle to inner leads using bond wires), a molding process (encapsulating a predetermined portion of the assembly, containing the die, inner leads and lead frame wires, with an epoxy resin to form a package body), and a trimming process (completing each assembly as individual, independent packages).
The integrated circuit packages, thus manufactured, are then mounted by matching and soldering the external leads or contact pads to a matching pattern on a circuit board, to thereby enable power and signal input/output (“I/O”) operations between the semiconductor devices in the packages and the circuit board.
An exemplary integrated circuit package, well known in the electronics industry, is the quad flat nonleaded (“QFN”) package. QFN packages typically include a lead frame, such as a conductive sheet stamped and etched, with a semiconductor die having a multitude of bond pads mounted to the top side of the lead frame. Bond wires electrically connect the bond pads of the semiconductor die to a series of conductive lead fingers on the topside of the lead frame. Typically, the semiconductor die and the bond wires are encapsulated within a molding compound.
In order to reduce manufacturing costs, the electronics industry is increasing the usage of QFN packages. In the manufacturing process, many obstacles must be overcome to deliver extremely small packages with small horizontal dimensions in high volume. Despite the trend towards miniaturization, more functions and more semiconductor die continue to be packed into QFN packages. Typical QFN solutions face problems providing the high density and high count I/O needed for modem electronic products.
Thus, a need still remains for an integrated circuit package system providing low cost manufacturing, improved yield, improved reliability, and high density I/O count. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.